The present invention relates to a method of processing the surface of a workpiece and a method of forming a semiconductor thin layer.
In some cases, an SOI (Silicon On Insulator) wafer including two semiconductor wafers which are bonded on each other is required to be manufactured. The manufacturing process of the SOI wafer as described above will be described briefly.
[Step-10]
First, the surface of a first semiconductor wafer 11 which is formed of a silicon semiconductor wafer is thermally oxidized to form an oxide film 12 of 0.3 xcexcm in film thickness on the surface of the first semiconductor wafer 11. Further, a second semiconductor wafer 13 formed of a silicon semiconductor wafer is prepared. A surface treatment is performed on the first and second semiconductor wafers 11 and 13 with a chemical of a hydrogen peroxide water group such as NH4OH/H2O2/H2O or H2SO4/H2O2/H2O to terminate the surface of the first and second semiconductor wafers 11 and 13 with OH-groups and form a bonding face on each of the first and second semiconductor wafers 11 and 13. Thereafter, when the bonding faces of the first and second semiconductor wafers 11 and 13 are brought into contact with each other, the first and second semiconductor wafers 11 and 13 are attached to each other by van der Waals. Thereafter, an anneal treatment at a temperature of 1100xc2x0 C. and for 2 hours is performed to release the OH-groups, thereby obtaining strong Sixe2x80x94Si coupling. Accordingly, the bonding of the first and second semiconductor wafers 11 and 13 can be achieved as shown in a schematic partially cross-sectional view of FIG. 1A.
[Step-20]
Subsequently, the first semiconductor wafer 11 is grounded or polished to thin the first semiconductor wafer 11 and form a semiconductor thin layer from the first semiconductor wafer 11, whereby an SOI wafer can be obtained.
[Step-30]
Thereafter, for example, a transistor device is formed in the semiconductor thin layer on the basis of a well-known method if occasion demands.
When an 8-inch wafer is used as the silicon semiconductor wafer, the average thickness of the silicon semiconductor wafer is equal to 725 xcexcm, and the in-plane thickness precision is equal to xc2x115 xcexcm. In the case of a high-precision silicon semiconductor wafer, the in-plane thickness precision is equal to about xc2x11.5 xcexcm, for example. A thickness precision of about xc2x1 several nm to about xc2x1several hundreds nm is needed as the demanded thickness precision of the semiconductor thin layer although it is varied in accordance with the applied field, and thus the thickness precision is required to be higher by one order to four orders of magnitude than the thickness precision of the silicon semiconductor wafer.
Nevertheless, the grinding/polishing work with respect to the back surface of the first semiconductor wafer 11 or the grinding/polishing work with respect to the back surface of the second semiconductor wafer 13 is performed in the conventional technique, so that the thickness precision of the semiconductor thin layer after the grinding/polishing work is low, and it is equal to about xc2x1500 nm.
[Step-20] will be described in detail with reference to FIG. 2.
FIG. 2A shows a grinding/polishing work with respect to the back surface of the second semiconductor wafer 13. In the grinding work, the back surface of the second semiconductor wafer 13 is fixed onto a wafer stage by a vacuum suction device (not shown), and the grinding/polishing work is performed with respect to the adsorbing face of the wafer stage (in other words, the back surface of the second semiconductor wafer 13). In this case, the grinding/polishing work is performed on the first semiconductor wafer 11 from the back surface thereof in parallel to the adsorbing face of the wafer stage to form a semiconductor thin layer 14. A dotted line Axe2x80x94A of FIG. 2A corresponds to the finished surface of the semiconductor thin layer 14, and a portion of the first semiconductor wafer 11 between the dotted line Axe2x80x94A and the oxide film 12 corresponds to the semiconductor thin layer 14.
As is apparent from FIG. 2A, even if it is assumed that the dispersion of the grinding/polishing work is small to the extent that it is negligible, the dispersion having the same level as the in-plane thickness precision of the second semiconductor wafer 13 occurs in the thickness of the semiconductor thin layer 14. The grinding work precision when a high-precision grinding machine is used is equal to about xc2x1300 nm. Accordingly, a precision of several hundreds cannot be achieved as the thickness precision of the semiconductor thin layer 14 unless a higher-precision silicon semiconductor wafer is selected as the second semiconductor wafer 13 from the high-precision silicon semiconductor wafers.
FIG. 2B shows the polishing work with respect to the back surface of the first semiconductor wafer 11. In the polishing work, an abrasive cloth which is attached onto a polishing fixed table and the back surface of the first semiconductor wafer 11 are confronted to each other. The abrasive cloth and the first and second semiconductor wafers 11 and 13 are rotated while abrasive grains (not shown) are interposed between the abrasive cloth and the back surface of the first semiconductor wafer 11, thereby polishing the back surface of the first semiconductor wafer 11. At this time, the semiconductor wafer is held by suitably pressing the overall first semiconductor wafer 11 so that the back surface of the first semiconductor wafer 11 is brought into contact with the abrasive cloth as flatly as possible. A dotted line Bxe2x80x94B of FIG. 2B corresponds to the finished surface of the semiconductor thin layer 14, and a portion of the first semiconductor wafer 11 between the dotted line Bxe2x80x94B and the oxide film 12 corresponds to the semiconductor thin layer 14. As is apparent from FIG. 2B, the back surface of the first semiconductor wafer 11 is equi-quantitatively polished on the overall surface from the initial surface state, so that the dispersion having the same level as the in-plane thickness precision of the first semiconductor wafer 11 occurs in the semiconductor thin layer 14.
In general, a polishing machine is more deteriorated in processing precision and processing speed than a grinding machine. Conversely, the roughness on the finished surface (unevenness state) is more excellent in the polishing machine. Accordingly, it is practically preferable that the back surface of the first semiconductor wafer 11 is ground by using the grinding machine in accordance with specifications of the semiconductor thin layer 14 so that the thickness thereof is larger than the desired thickness of the semiconductor thin layer 14 by several xcexcm, and then the first semiconductor wafer 11 is polished by using the polisher so that the thickness thereof is equal to the desired thickness of the semiconductor thin layer.
In the cases of FIGS. 2A and 2B, any sufficient work precision cannot be obtained. That is, any semiconductor layer 14 having the desired thickness precision cannot be obtained.
The main cause is as follows. That is, the grinding/polishing work is performed with respect to the back surface of any one of the bonded semiconductor wafers, and thus any semiconductor thin layer 14 having a thickness precision which is higher than the original thickness precision of the first or second semiconductor wafer 11, 13 cannot be obtained.
A partial polishing method or a partial etching method has been proposed as a countermeasure of solving the above problem. FIG. 3 shows a polishing work of the back surface of the first semiconductor wafer 11 by the partial polishing method. In the partial polishing method, the thickness of the first semiconductor wafer 11 which remains after the polishing is measured, and the polishing work based on the measurement data thus obtained is controlled, so that the polishing work with respect to the oxide film 12 in the semiconductor wafer after the bonding can be performed. However, the shape (planar shape) of the oxide film 12 serving as the reference is not fixed, and it is normally uneven. Therefore, a partial polishing work is needed.
In the case of FIG. 3, the partial polishing work using a polishing head is performed. The diameter of the polishing head is equal to 10 mm, for example. As indicated by a dotted line, the surface of the semiconductor thin layer 14 thus obtained is designed in a step form. When the back surface of the first semiconductor wafer 11 is processed (or etched) by a dry etching method using a plasma generator for generating plasma of about 10 mm in diameter in place of use of the polishing head, the surface of the semiconductor thin layer 14 thus obtained is also designed in a step form.
The thickness precision of the semiconductor thin layer thus obtained can be enhanced as the area of the polishing head is reduced. For example, a processing example of a semiconductor thin layer having a high-precision thickness of xc2x110 nm, for example has been reported. As described above, the polishing work with respect to the oxide film 12 can be performed, and thus the high-precision work can be obtained. However, the partial polishing work is repeated, and thus if the processing precision is enhanced, the processing time is increased. In addition, there is a problem that a step occurs at the bonding portion and the step thus formed cannot be perfectly removed even by the finishing polishing work.
An object of the present invention is to a workpiece surface processing method of processing the surface of a workpiece and a method of forming a semiconductor thin layer which can work the surface of a workpiece with high precision while not being dependent on the thickness precision of the workpiece before the surface processing, can obtain the excellent surface state in a short time and also can collectively work the surface of the workpiece.
In order to attain the above object, a workpiece surface processing method according to a first aspect of the present invention is characterized by comprising the steps of: setting a reference plane in a workpiece; and controlling the reference plane in a desired shape and then removing the material constituting the workpiece from the surface of the workpiece toward the reference plane.
In the workpiece surface processing method according to the first aspect of the present invention, the material constituting the workpiece may be removed so that the workpiece after the surface processing remains partially on the reference plane, or the material may be removed up to the reference plane to thereby expose the reference plane to the outside. The shape of the reference plane (which is a planar shape and means an unevenness state) may be set to any one, and for example, it may be set to a flat shape having a plane surface, a curved shape having a curved surface or the like.
In the workpiece surface processing method according to the first aspect of the present invention, it is preferable that the workpiece is mounted on a mounting table and then the shape of the workpiece holding face of the mounting table is controlled so that the reference plane is controlled to have a desired shape. Here, the control of the shape of the workpiece holding face of the mounting table more specifically means that the workpiece holding face of the mounting table is varied in an uneven shape. In this case, the shape of the workpiece holding face can be controlled with the data of the distance from the surface of the workpiece to the reference plane in the state where the workpiece is mounted on the mounting table. Alternatively, the shape of the workpiece holding face can be controlled with the data of the distance from the workpiece holding face to the reference plane in the state where the workpiece is mounted on the mounting table.
In the workpiece surface processing method according to the first aspect of the present invention, it is preferable to mechanically remove the material constituting the workpiece. In this case, the material constituting the workpiece may be removed by a grinding method, polishing method, a chemical/mechanical/polishing (mechano-chemical polishing) method, a lapping method, a cutting method (sawing method), an etching method, or a combination thereof.
The workpiece of the surface processing method of the workpiece according to the present invention is not limited to a specific one, and a bonding wafer of two semiconductor wafers, bonded glass or the like may be used as the workpiece.
In order to attain the above object, a semiconductor thin layer forming method according to a second aspect of the present invention is characterized in that the surface of a first semiconductor wafer and the surface of a second semiconductor wafer are bonded on each other, a reference plane which is set in the first semiconductor wafer or the second semiconductor wafer is controlled in a desired shape, and then a portion or part of the first semiconductor wafer is removed from the back surface of the first semiconductor wafer to the reference plane to form a semiconductor thin layer from the residual first semiconductor wafer.
As in the case of the workpiece surface processing method of the first aspect of the present invention, in the semiconductor thin layer forming method according to the second aspect of the present invention, the surface of the first semiconductor wafer and the surface of the second semiconductor wafer are bonded to each other (the two semiconductor wafers after bonded to each other are referred to as a xe2x80x9cbonded waferxe2x80x9d), then the bonded wafer is mount on the mounting table with the second semiconductor wafer placed at the lower side, and then the shape of the workpiece holding face of the mounting table is controlled to control a reference plane in a desired shape. That is, it is preferable to vary the workpiece holding face on the mounting table in a desired uneven condition. In this case, the shape of the workpiece holding plane can be controlled with the data of the distance from the back surface of the first semiconductor wafer to the reference plane in the state where the bonded wafer is mounted on the mounting table. Alternatively, the shape of the workpiece holding face can be controlled with the data of the distance from the workpiece holding face to the reference plane in the state where the bonded wafer is mounted on the bonding table.
In the semiconductor thin layer forming method of the second aspect of the present invention, it is preferable to mechanically remove a part of portion of the first semiconductor wafer. In this case, the first semiconductor wafer may be removed by a grinding method, a polishing method, a chemical/mechanical/polishing (mechano-chemical polishing) method, a lapping method, a cutting method (sawing method), an etching method, or a combination thereof. The shape of the reference plane (which is a planar shape and means an uneven state) may be set to any shape, and it may be set to a flat shape having a plane, for example.
In the workpiece surface processing method according to the first aspect of the present invention, the material constituting the workpiece is removed from the surface of the workpiece toward the reference plane after the reference plane is controlled in a desired shape. Therefore, the surface processing of the workpiece can be performed with high precision without being dependent on the thickness precision of the workpiece before the surface processing. In addition, the surface processing of the workpiece can be performed with high precision without needing any partial polishing work which has been required in the conventional technique. Therefore, the excellent surface state can be gained in a short time, and the surface of the workpiece can be collectively worked.
In the semiconductor thin layer forming method according to the second aspect of the present invention, the reference plane of the first semiconductor wafer or the second semiconductor wafer is controlled in a desired shape, and then a part of the first semiconductor wafer is removed from the back surface of the first semiconductor wafer toward the reference plane. Therefore, a part of the first semiconductor wafer can be removed with high precision without being dependent on the thickness precision of the first or second semiconductor wafer before the semiconductor thin layer is formed. In addition, a part of the first semiconductor wafer can be removed with high precision without needing any partial polishing work which has been needed in the conventional technique. Therefore, the excellent surface state can be obtained in a short time, and a part of the first semiconductor wafer can be collectively removed.